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[Perf, Test] (ShaderTranspiler, DirectGLES): answer both pass-gate probes from one SPIR-V parse
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@@ -247,6 +247,26 @@ TEST_F(ClampMultisampleFetchTest, TheProbeAnswersOnlyForAMultisampledImage) {
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EXPECT_FALSE(ShaderCompiler::DeclaresMultisampledImage({}));
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}
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// The combined probe answers both gate questions from one parse; it must agree with the
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// per-gate probes on the same modules and stay quiet for an empty stage.
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TEST_F(ClampMultisampleFetchTest, TheCombinedProbeAgreesWithThePerGateOnes) {
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const Vector<Uint32> integerMs = CompileFragment(kIntegerMultisampleFetch);
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ASSERT_FALSE(integerMs.empty());
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const auto msFeatures = ShaderCompiler::ProbeSpirvGateFeatures(integerMs);
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EXPECT_TRUE(msFeatures.DeclaresMultisampledImage);
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EXPECT_FALSE(msFeatures.WritesViewportIndexOutput);
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const Vector<Uint32> plain = CompileFragment(kNoMultisampleFetch);
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ASSERT_FALSE(plain.empty());
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const auto plainFeatures = ShaderCompiler::ProbeSpirvGateFeatures(plain);
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EXPECT_FALSE(plainFeatures.DeclaresMultisampledImage);
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EXPECT_FALSE(plainFeatures.WritesViewportIndexOutput);
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const auto emptyFeatures = ShaderCompiler::ProbeSpirvGateFeatures({});
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EXPECT_FALSE(emptyFeatures.DeclaresMultisampledImage);
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EXPECT_FALSE(emptyFeatures.WritesViewportIndexOutput);
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}
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// The overwhelming majority of modules. Behind the probe they never reach the pass at all, but the
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// pass has to be inert for them on its own, or a future caller that forgets the gate silently
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// re-serialises every shader in the program.
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