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- Layout only: token streams match up to split literals, continuations and using order - The size totals fall, so the structure baseline is lowered
266 lines
12 KiB
C++
266 lines
12 KiB
C++
// MobileGL - MobileGL/MG_Test/ShaderTranspiler/EmulateSubgroupsTest.cpp
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// Copyright (c) 2026 MobileGL-Dev
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// Licensed under the GNU Lesser General Public License v3.0:
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// https://www.gnu.org/licenses/gpl-3.0.txt
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// https://www.gnu.org/licenses/lgpl-3.0.txt
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// SPDX-License-Identifier: LGPL-3.0-only
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// End of Source File Header
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#include <gtest/gtest.h>
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#define SPV_ENABLE_UTILITY_CODE
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#include "glslang/SPIRV/spirv.hpp11"
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#undef SPV_ENABLE_UTILITY_CODE
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#include "Includes.h"
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#include <MG_Util/ShaderTranspiler/ShaderCompiler.h>
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#include <MG_Util/ShaderTranspiler/Types.h>
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#include <spirv-tools/libspirv.hpp>
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using namespace MobileGL;
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using MobileGL::MG_Util::ShaderTranspiler::ShaderCompiler;
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namespace {
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constexpr SizeT kSpirvHeaderWordCount = 5u;
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template <typename Visitor>
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void ForEachInstruction(const Vector<Uint32>& spirv, Visitor&& visit) {
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for (SizeT offset = kSpirvHeaderWordCount; offset < spirv.size();) {
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const Uint32 wordCount = spirv[offset] >> 16u;
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if (wordCount == 0u || offset + wordCount > spirv.size()) break;
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visit(static_cast<spv::Op>(spirv[offset] & 0xffffu), &spirv[offset], wordCount);
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offset += wordCount;
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}
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}
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Vector<Uint32> CompileStage(GLenum stage, const String& source) {
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using namespace MobileGL::MG_Util::ShaderTranspiler;
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ShaderAttrib shaderAttrib{.shaderType = stage, .sourceStr = source};
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auto shaderResult = ShaderCompiler::CompileShader(shaderAttrib);
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EXPECT_TRUE(shaderResult) << (shaderResult ? String{} : shaderResult.error().log);
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if (!shaderResult) return {};
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ProgramAttrib programAttrib{.shaders = {shaderResult.value()}};
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auto programResult = ShaderCompiler::LinkProgram(programAttrib);
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EXPECT_TRUE(programResult) << (programResult ? String{} : programResult.error().log);
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if (!programResult) return {};
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ProgramBinaryAttrib binaryAttrib{.shaderTypes = {stage}, .program = *programResult.value()};
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auto binaryResult = ShaderCompiler::GetSpirvBinaryFromProgram(binaryAttrib);
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EXPECT_TRUE(binaryResult) << (binaryResult ? String{} : binaryResult.error().log);
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if (!binaryResult || binaryResult->empty()) return {};
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return binaryResult->front();
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}
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Uint32 CountGroupNonUniform(const Vector<Uint32>& spirv) {
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Uint32 count = 0;
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ForEachInstruction(spirv, [&](spv::Op opcode, const Uint32*, Uint32) {
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if (opcode >= spv::Op::OpGroupNonUniformElect && opcode <= spv::Op::OpGroupNonUniformQuadSwap) {
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++count;
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}
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});
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return count;
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}
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Uint32 CountGroupNonUniformCapabilities(const Vector<Uint32>& spirv) {
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Uint32 count = 0;
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ForEachInstruction(spirv, [&](spv::Op opcode, const Uint32* words, Uint32 wordCount) {
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if (opcode != spv::Op::OpCapability || wordCount < 2u) return;
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const auto capability = static_cast<spv::Capability>(words[1]);
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if (capability >= spv::Capability::GroupNonUniform && capability <= spv::Capability::GroupNonUniformQuad) {
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++count;
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}
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});
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return count;
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}
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Uint32 CountOpcode(const Vector<Uint32>& spirv, spv::Op wanted) {
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Uint32 count = 0;
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ForEachInstruction(spirv, [&](spv::Op opcode, const Uint32*, Uint32) {
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if (opcode == wanted) ++count;
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});
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return count;
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}
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bool HasWorkgroupVariable(const Vector<Uint32>& spirv) {
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bool found = false;
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ForEachInstruction(spirv, [&](spv::Op opcode, const Uint32* words, Uint32 wordCount) {
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if (opcode == spv::Op::OpVariable && wordCount >= 4u &&
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static_cast<spv::StorageClass>(words[3]) == spv::StorageClass::Workgroup) {
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found = true;
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}
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});
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return found;
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}
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bool Validates(const Vector<Uint32>& spirv) {
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spvtools::SpirvTools tools(SPV_ENV_VULKAN_1_1);
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tools.SetMessageConsumer(
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[](spv_message_level_t, const char*, const spv_position_t& position, const char* message) {
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ADD_FAILURE() << "spirv-val at word " << position.index << ": " << message;
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});
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return tools.Validate(spirv);
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}
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// One shader touching every lowered category: builtins, vote, arithmetic
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// scans, ballot math, shuffles, clustered and quad operations.
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constexpr const char* kEveryCategorySource = R"(#version 450 core
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#extension GL_KHR_shader_subgroup_basic : require
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#extension GL_KHR_shader_subgroup_vote : require
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#extension GL_KHR_shader_subgroup_arithmetic : require
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#extension GL_KHR_shader_subgroup_ballot : require
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#extension GL_KHR_shader_subgroup_shuffle : require
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#extension GL_KHR_shader_subgroup_shuffle_relative : require
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#extension GL_KHR_shader_subgroup_clustered : require
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#extension GL_KHR_shader_subgroup_quad : require
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layout(local_size_x = 48, local_size_y = 1, local_size_z = 1) in;
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layout(std430, binding = 0) buffer Output { float value[]; } outputData;
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void main() {
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uint slot = gl_LocalInvocationIndex * 24u;
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float v = float(gl_LocalInvocationIndex + 1u);
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outputData.value[slot + 0u] = float(gl_SubgroupSize);
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outputData.value[slot + 1u] = float(gl_NumSubgroups);
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outputData.value[slot + 2u] = float(gl_SubgroupID);
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outputData.value[slot + 3u] = float(gl_SubgroupInvocationID);
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outputData.value[slot + 4u] = float(gl_SubgroupEqMask.x + gl_SubgroupLtMask.x);
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outputData.value[slot + 5u] = subgroupElect() ? 1.0 : 0.0;
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outputData.value[slot + 6u] = subgroupAll(v > 0.0) ? 1.0 : 0.0;
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outputData.value[slot + 7u] = subgroupAny(v > 40.0) ? 1.0 : 0.0;
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outputData.value[slot + 8u] = subgroupAllEqual(gl_WorkGroupID.x) ? 1.0 : 0.0;
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outputData.value[slot + 9u] = subgroupAdd(v);
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outputData.value[slot + 10u] = subgroupInclusiveAdd(v);
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outputData.value[slot + 11u] = subgroupExclusiveMax(v);
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outputData.value[slot + 12u] = float(subgroupMin(gl_LocalInvocationIndex));
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uvec4 ballot = subgroupBallot((gl_LocalInvocationIndex & 1u) == 0u);
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outputData.value[slot + 13u] = float(subgroupBallotBitCount(ballot));
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outputData.value[slot + 14u] = float(subgroupBallotFindLSB(ballot));
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outputData.value[slot + 15u] = float(subgroupBallotFindMSB(ballot));
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outputData.value[slot + 16u] = subgroupInverseBallot(ballot) ? 1.0 : 0.0;
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outputData.value[slot + 17u] = subgroupBallotBitExtract(ballot, 3u) ? 1.0 : 0.0;
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outputData.value[slot + 18u] = subgroupBroadcast(v, 2u);
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outputData.value[slot + 19u] = subgroupBroadcastFirst(v);
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outputData.value[slot + 20u] = subgroupShuffle(v, gl_SubgroupInvocationID ^ 5u);
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outputData.value[slot + 21u] = subgroupShuffleXor(v, 1u) + subgroupShuffleUp(v, 1u) +
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subgroupShuffleDown(v, 1u);
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outputData.value[slot + 22u] = subgroupClusteredAdd(v, 4u);
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outputData.value[slot + 23u] = subgroupQuadBroadcast(v, 1u) + subgroupQuadSwapHorizontal(v);
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subgroupBarrier();
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subgroupMemoryBarrierShared();
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}
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)";
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constexpr const char* kNoSubgroupSource = R"(#version 450 core
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layout(local_size_x = 64) in;
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layout(std430, binding = 0) buffer Output { uint value; } outputData;
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void main() {
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if (gl_LocalInvocationIndex == 0u) outputData.value = gl_WorkGroupSize.x;
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}
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)";
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// An extended subgroup instruction (SPV_KHR_subgroup_rotate) alongside core
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// ones: outside the lowered set, so the pass must fail rather than emit
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// "subgroup-free" output that still rotates.
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constexpr const char* kRotateSource = R"(#version 450 core
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#extension GL_KHR_shader_subgroup_basic : require
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#extension GL_KHR_shader_subgroup_arithmetic : require
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#extension GL_KHR_shader_subgroup_rotate : require
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layout(local_size_x = 64) in;
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layout(std430, binding = 0) buffer Output { float value[]; } outputData;
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void main() {
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float v = subgroupAdd(float(gl_SubgroupInvocationID));
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outputData.value[gl_LocalInvocationIndex] = subgroupRotate(v, 1u);
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}
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)";
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// A 1024-invocation workgroup exchanging a vec4 and a float: the lowering
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// would need 16 KiB + 4 KiB of scratch, past the Vulkan-minimum shared
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// budget of 16384 bytes.
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constexpr const char* kScratchHungrySource = R"(#version 450 core
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#extension GL_KHR_shader_subgroup_basic : require
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#extension GL_KHR_shader_subgroup_arithmetic : require
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layout(local_size_x = 1024) in;
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layout(std430, binding = 0) buffer Output { vec4 value[]; } outputData;
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void main() {
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vec4 wide = subgroupAdd(vec4(float(gl_LocalInvocationIndex)));
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wide.x += subgroupInclusiveAdd(float(gl_SubgroupInvocationID));
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outputData.value[gl_LocalInvocationIndex] = wide;
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}
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)";
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} // namespace
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TEST(EmulateSubgroupsPass, LowersEveryCategoryToSharedMemory) {
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const Vector<Uint32> input = CompileStage(GL_COMPUTE_SHADER, kEveryCategorySource);
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ASSERT_FALSE(input.empty());
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ASSERT_GT(CountGroupNonUniform(input), 0u);
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ASSERT_GT(CountGroupNonUniformCapabilities(input), 0u);
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Vector<Uint32> output;
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ASSERT_TRUE(ShaderCompiler::EmulateSubgroupsForVulkan(input, output, 16384u, true));
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ASSERT_TRUE(Validates(output));
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// The whole point: nothing subgroup-shaped survives, so the module runs on a
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// device with no subgroup support at all.
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EXPECT_EQ(CountGroupNonUniform(output), 0u);
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EXPECT_EQ(CountGroupNonUniformCapabilities(output), 0u);
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// The exchanges go through workgroup-shared scratch behind control barriers.
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EXPECT_TRUE(HasWorkgroupVariable(output));
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EXPECT_GT(CountOpcode(output, spv::Op::OpControlBarrier), CountOpcode(input, spv::Op::OpControlBarrier));
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}
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// The stale-shared-load repair: every scratch read becomes an OpAtomicLoad of a uint word
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// (floats, ints and vectors cross by bitcast), and the module still validates.
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TEST(EmulateSubgroupsPass, ReadsScratchThroughAtomicLoadsWhenAsked) {
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const Vector<Uint32> input = CompileStage(GL_COMPUTE_SHADER, kEveryCategorySource);
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ASSERT_FALSE(input.empty());
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Vector<Uint32> plain;
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ASSERT_TRUE(ShaderCompiler::EmulateSubgroupsForVulkan(input, plain, 16384u, true, false));
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EXPECT_EQ(CountOpcode(plain, spv::Op::OpAtomicLoad), 0u);
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Vector<Uint32> atomic;
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ASSERT_TRUE(ShaderCompiler::EmulateSubgroupsForVulkan(input, atomic, 16384u, true, true));
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ASSERT_TRUE(Validates(atomic));
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EXPECT_EQ(CountGroupNonUniform(atomic), 0u);
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EXPECT_GT(CountOpcode(atomic, spv::Op::OpAtomicLoad), 0u);
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EXPECT_GT(CountOpcode(atomic, spv::Op::OpBitcast), CountOpcode(plain, spv::Op::OpBitcast));
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}
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TEST(EmulateSubgroupsPass, IsIdempotent) {
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const Vector<Uint32> input = CompileStage(GL_COMPUTE_SHADER, kEveryCategorySource);
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ASSERT_FALSE(input.empty());
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Vector<Uint32> once;
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ASSERT_TRUE(ShaderCompiler::EmulateSubgroupsForVulkan(input, once, 16384u, true));
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Vector<Uint32> twice;
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ASSERT_TRUE(ShaderCompiler::EmulateSubgroupsForVulkan(once, twice, 16384u, true));
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EXPECT_EQ(twice, once);
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}
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TEST(EmulateSubgroupsPass, LeavesSubgroupFreeComputeUntouched) {
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const Vector<Uint32> input = CompileStage(GL_COMPUTE_SHADER, kNoSubgroupSource);
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ASSERT_FALSE(input.empty());
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Vector<Uint32> output;
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ASSERT_TRUE(ShaderCompiler::EmulateSubgroupsForVulkan(input, output, 16384u, true));
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EXPECT_EQ(output, input);
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}
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TEST(EmulateSubgroupsPass, RefusesExtendedSubgroupInstructions) {
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const Vector<Uint32> input = CompileStage(GL_COMPUTE_SHADER, kRotateSource);
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ASSERT_FALSE(input.empty());
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Vector<Uint32> output;
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EXPECT_FALSE(ShaderCompiler::EmulateSubgroupsForVulkan(input, output, 16384u, false));
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}
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TEST(EmulateSubgroupsPass, RefusesAModuleOverTheScratchBudget) {
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const Vector<Uint32> input = CompileStage(GL_COMPUTE_SHADER, kScratchHungrySource);
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ASSERT_FALSE(input.empty());
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// vec4 scratch (1024 slots * 16 bytes) plus float scratch (4 KiB) exceeds
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// the 16 KiB Vulkan-minimum budget.
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Vector<Uint32> output;
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EXPECT_FALSE(ShaderCompiler::EmulateSubgroupsForVulkan(input, output, 16384u, false));
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// A device advertising more shared memory takes the same module fine.
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Vector<Uint32> roomier;
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EXPECT_TRUE(ShaderCompiler::EmulateSubgroupsForVulkan(input, roomier, 32768u, true));
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EXPECT_TRUE(Validates(roomier));
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}
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