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[MG_IntegrationTest] (P7): the flipped multisample resolve case asserts on the magma wire arm only and skips the monolith and espryt entries by name
- The suite is discovered whole on the monolith DirectVulkan arm and on every DirectGLES arm, and the case was red on all of them: the monolith refuses a flipped depth blit and scales a multisample one GL calls INVALID_OPERATION, and Espryt writes nothing for the flip and raises nothing for the scale.
- A backend gate first (Gl().BackendName() != "DirectVulkan", Espryt reason, P3b/P4b), then the lane marker (SplitLane::IsSplitLane(), monolith reason, P13/G1-bound), so a DirectGLES entry names the backend that owes the fix whichever lane it sits in.
- DirectVulkan.{Split,Spawn,Tcp}.MsFlip. stay armed (all carry MGITEST_SPLIT_LANE=1) and pass.
- Verified: DirectVulkan.DepthStencilReadbackMatrixScenario.AFlipped* and DirectGLES.{,ForcedDepthStencilEmulation.}DepthStencilReadbackMatrixScenario.AFlipped* report Skipped with those reasons.
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@@ -44,6 +44,7 @@
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#include "../Harness/HeadlessGL.h"
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#include "../Harness/ScenarioFixture.h"
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#include "../Harness/SplitLane.h"
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#ifdef GLAPI
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#undef GLAPI
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@@ -422,8 +423,35 @@ namespace MGITest {
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// THE BANDS ARE UNEQUAL ON PURPOSE (0.25 bottom / 0.75 top): a flip that did not happen
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// returns the bands the right way up, and a "flip" that merely reordered the readback would
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// move the colour too - so colour and depth are checked to agree about which way up they are.
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//
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// THE CASE IS ARMED ON THE MAGMA WIRE ARM ONLY, and the two gates below say which of the
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// other arms that discover it (the suite is registered whole on the monolith DirectVulkan
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// arm and on every DirectGLES arm) owe this picture and do not yet produce it. Both are
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// recorded debts (notes/p7/magma-b2.md §6), not agreements with the wrong answer:
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// - Espryt (DirectGLES, monolith and split alike): the flipped resolve writes nothing and
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// raises no error, and the scaled one raises no error either. P3b/P4b.
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// - the monolith DirectVulkan arm: `VulkanRenderer.cpp` refuses a depth blit with a
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// flipped rectangle ("depth blits with flipped rectangles are not supported yet" - the
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// destination keeps its clear, no error) and scales a multisample depth blit that GL
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// calls INVALID_OPERATION. The wire arm is the more correct one here; the monolith fix
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// is P13/G1-bound.
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// The backend gate runs first so a DirectGLES entry names the backend that owes the fix,
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// whichever lane it sits in; MGITEST_SPLIT_LANE then separates the wire DirectVulkan arms
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// (`DirectVulkan.{Split,Spawn,Tcp}.MsFlip*.`, all of which carry it) from the monolith one.
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TEST_F(DepthStencilReadbackMatrixScenario, AFlippedMultisampleResolveMirrorsTheBandsAndAScaleDeclines) {
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if (!Ready()) return;
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if (Gl().BackendName() != "DirectVulkan") {
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GTEST_SKIP() << "Espryt (" << Gl().BackendName() << ") does not produce this picture yet: a "
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"flipped multisample depth resolve writes nothing with no error and a scaled "
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"one raises no INVALID_OPERATION - a P3b/P4b debt (notes/p7/magma-b2.md §6)";
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}
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if (!SplitLane::IsSplitLane()) {
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GTEST_SKIP() << "the monolith DirectVulkan arm (MGITEST_SPLIT_LANE unset) refuses a flipped "
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"depth blit (\"depth blits with flipped rectangles are not supported yet\", "
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"destination untouched, no error) and scales a multisample depth blit GL "
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"calls INVALID_OPERATION - a wire-vs-monolith divergence where the wire arm "
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"is the correct one; the monolith fix is P13/G1-bound (notes/p7/magma-b2.md §6)";
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}
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DepthSource multisampled = MakeRenderbufferSource(GL_DEPTH24_STENCIL8, 4);
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if (!SourceIsUsable()) {
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DestroySource(multisampled);
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