Swung0x48
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8cf2e2aea9
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[Fix] (Getter): answer GL_PATCH_DEFAULT_*_LEVEL from the float state in glGetBooleanv and write every component in glGetInteger64v
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2026-08-27 03:18:15 -04:00 |
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Swung0x48
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31252cf0da
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[Fix] (Tessellation): bound the pass-through control-stage cache and stop baking "draw nothing" for levels GL clamps
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2026-08-27 03:18:14 -04:00 |
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Swung0x48
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2635fe84b6
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[Fix] (Tessellation): compare the default patch levels by bit pattern, so a NaN level stops re-linking the program on every draw
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2026-08-27 03:18:13 -04:00 |
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Swung0x48
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e3163233a5
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[Fix] (Framebuffer): apply the glFramebufferTexture error conditions to the 2D/3D/Layer attach paths and bound a view by its own level count
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2026-08-27 03:18:12 -04:00 |
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Swung0x48
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eb9e4fdac1
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[Fix] (DirectVulkan): report the index the arbitrary-restart rewrite cannot represent instead of silently drawing a different vertex
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2026-08-27 03:18:10 -04:00 |
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Swung0x48
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90b7a689c5
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[Fix] (Backend): resolve primitive restart per draw - never for a non-indexed one, and never on an index the type cannot hold
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2026-08-27 03:18:09 -04:00 |
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Swung0x48
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e69e939d1a
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[Fix] (ProgramLink): fail the link when a tessellation control stage declares more output vertices than GL_MAX_PATCH_VERTICES
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2026-08-27 02:11:23 -04:00 |
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Swung0x48
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b675e2a0b0
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[Fix] (Drawing): refuse a draw whose program runs a geometry or tessellation stage with no vertex shader
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2026-08-27 02:11:21 -04:00 |
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Swung0x48
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6979926a6f
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[Fix] (Framebuffer): the four glFramebufferTexture error conditions the DSA sibling already implemented
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2026-08-27 02:11:20 -04:00 |
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Swung0x48
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d5286e69b6
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[Feat] (Tessellation): implement glPatchParameterfv and bake the default levels into both pass-through control stages
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2026-08-27 02:11:19 -04:00 |
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Swung0x48
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0f2fcbc469
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[Fix] (Backend): honour desktop GL_PRIMITIVE_RESTART with an arbitrary index instead of throwing through the C GL ABI
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2026-08-27 02:11:18 -04:00 |
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Swung0x48
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8f19ce6fa7
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[Fix, Test] (DirectGLES): rename an image SPIRV-Cross already qualified so two stages cannot merge it
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2026-08-22 03:46:35 -04:00 |
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Swung0x48
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cdba7bed2e
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[Test, Bench] (ShaderTranspiler): pin L1 backend-agnosticism and measure the whole-front-end hit
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2026-08-20 12:00:01 -04:00 |
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Swung0x48
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1eeeb44d94
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[Perf] (ProgramState): serve a whole linked program from translation cache L1, skipping the link entirely
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2026-08-20 12:00:01 -04:00 |
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Swung0x48
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14744f117c
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[Refactor] (ProgramInterface): build the program-resource model from the reflection snapshot, retiring GetReflection
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2026-08-20 11:47:57 -04:00 |
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Swung0x48
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8329ab4264
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[Refactor] (ProgramState): answer the GL query surface from an owned reflection snapshot, not the live TProgram
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2026-08-20 11:43:42 -04:00 |
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Swung0x48
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93f1106ba4
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[Fix] (ShaderTranspiler): key translation cache L1 on the front-end environment only, not backend identity
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2026-08-20 11:30:31 -04:00 |
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Swung0x48
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5fecfa42f6
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[Bench] (ShaderTranspiler): bracket the translation-cache win with a CTS-sized and a heavy stage
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2026-08-20 11:11:37 -04:00 |
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Swung0x48
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d48e5d0053
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[Fix] (ShaderTranspiler): leak the translation caches so no worker inserts into a destroyed one at exit
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2026-08-20 11:09:01 -04:00 |
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Swung0x48
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7a0182b58f
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[Bench] (ShaderTranspiler): measure the translation cache on a repeated-compile loop
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2026-08-20 10:59:46 -04:00 |
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Swung0x48
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0f523db14d
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[Test] (ShaderTranspiler): cover both translation-cache key inventories, eviction and the concurrent path
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2026-08-20 10:59:46 -04:00 |
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Swung0x48
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442cec1a15
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[Perf] (DirectGLES): memoize the SPIR-V to ESSL transpile per stage (translation cache L2)
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2026-08-20 10:51:05 -04:00 |
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Swung0x48
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246a438138
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[Perf] (ShaderTranspiler): memoize a linked program's sanitized SPIR-V (translation cache L1)
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2026-08-20 10:51:05 -04:00 |
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Swung0x48
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eaba4ac1dc
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[Fix, Docs] (MG_Backend/DirectGLES): drain the attachment-format probe, and document the depth/stencil readback emulation switch
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2026-08-12 12:09:45 -04:00 |
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Swung0x48
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ed6578954e
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[Feat, Fix, Test] (MG_Backend/DirectGLES, MG_IntegrationTest): emulate ES depth/stencil readback by shader sampling, and stop the replicate blit leaking its borrowed texture unit
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2026-08-12 11:38:34 -04:00 |
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