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[Docs] (P8): close the phase - ruling ID-P8-19 (the exit device check and the P12 cross-host rerun), the P8 README and PLAN, the roadmap row and header, MEASUREMENTS row 19, the status page and the last debt
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2026-09-30 08:25:38 -04:00 |
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[Docs] (P8): CONTRACT-P8 (the rules P8 landed, each with its code anchor and its test), rulings ID-P8-14..18 (MD + MF and the create-indirect fixture's alignment, SE, SV, the dev merge, the wave 2 integration gate) and the debts wave 2 hands on
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2026-09-30 07:55:50 -04:00 |
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[Merge] (P8): integrate wave 2 package MF - the push flush ladder gets dev's Adreno 830 queued-ring-copy guard (FlushPendingRangesFrom, create-instancing x Espryt x monolith 0.870 -> 0.99998 on the Redmi), and both G5 scripts pin the two reviewed ladder bodies under ID-P8-14
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2026-09-30 07:12:50 -04:00 |
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[Docs] (P8-MF): the package note - the push-ladder mirror of dev f973008c, create-instancing Espryt monolith 0.870 -> 0.99998 on the Redmi with spawn unchanged, why spawn was unaffected (the same two partial maps behind queued ring copies, the copy already submitted by the server's intervening whole-buffer maps), the red-onces and the gate
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2026-09-30 07:09:28 -04:00 |
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[Merge] (P8): integrate wave 2 package SV - Magma's 3D native mip blit uses one layer, the depth/stencil mip decline gets its tally row, 1D depth mips decline by name, and the wire arm issues glDispatchComputeIndirect natively
# Conflicts:
# MobileGL/MG_IntegrationTest/CMakeLists.txt
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2026-09-30 06:11:04 -04:00 |
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[CI] (scripts, P8-MF): pin G5's tenth row as well and re-pin both flush ladders on the reviewed post-fix bodies (ID-P8-14) - dev f973008c moved FlushPendingRangesNow past every base ref CI passes (the Adreno 830 queued ring copy) and ac9ab078 mirrors it into FlushPendingRangesFrom; both scripts' self-tests now run the pin-precedence and one-token controls on both ladders
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2026-09-30 05:45:10 -04:00 |
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[Fix] (Espryt, P8-MF): the push arm's flush ladder keeps a partial range-invalidating map behind an upload-ring copy still queued on the store, as dev f973008c's pull arm does - FlushPendingRangesFrom's ring tier stamps ringCopyRetireSerial and InvalidateFlushAccessFor refuses tier 1 for a partial range while that copy is unretired (the whole-buffer orphan-map stays exempt); Adreno 830 loses the queued copy and create-instancing on the monolith arm drew terrain sections empty
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2026-09-30 05:43:55 -04:00 |
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[Merge] (P8): integrate wave 2 package SE - the spawn/tcp default framebuffer publishes its surface to the client, the CPU mip arm declines on a driver-written base, D's case 3 runs on the Espryt split arms, the unmigrated-emulation name list is linted against its call sites, and the P8 notes' citations point at their content again
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2026-09-30 05:24:11 -04:00 |
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[Docs] (P8-SV): the note's gate table (G1 0/0, wire-declines 61/66, split_coverage, every lane, retrace 230/236) and the dirty-surface scan finding
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2026-09-30 05:02:37 -04:00 |
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[Docs] (P8-SE): the note's gate and retrace readings
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2026-09-30 04:47:27 -04:00 |
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[Test] (P8-SV): rename WireIndirectDispatchScenario's dispatch store member m_parameters -> m_groupCounts - gen_pipe_dirty_surface.py reads writes to shutter member names across all of MobileGL, and the name made NEW_PATCH_STATE's shutter look written outside its roots (self-test negative control 16 stopped tripping)
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2026-09-30 04:42:06 -04:00 |
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[Merge] (P8): merge dev f973008c - the Espryt partial-flush fix for a queued ring copy on Adreno 830 (wave 2 MD), and dev's empty-binding uniform block fix deduplicated against P11's 7784d6bb (one code path), UnboundUniformBlockScenario registered on the split arms
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2026-09-30 04:34:15 -04:00 |
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[Fix] (Espryt): a partial buffer flush no longer takes the range-invalidating map while an upload-ring copy into the same store may still be queued - Adreno 830 loses the queued copy, and create-instancing drew whole Embeddium terrain sections empty
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2026-09-30 04:07:41 -04:00 |
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[Docs] (P8-SE): cite the integration CMakeLists by path - the bare basename resolves to the top-level file
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2026-09-30 03:55:20 -04:00 |
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[Docs] (P8-SE): the package note, and the P8 package notes' line citations re-anchored by content at HEAD (A 14, B 29, C 10, D 12, E 18 plus the copy-image-shadow-mirror line, F 4)
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2026-09-30 03:55:01 -04:00 |
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[Test] (P8-SE): the ForcedDs knob lanes run the default-framebuffer depth/stencil case again on all three arms (it was subtracted while red on spawn / tcp)
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2026-09-30 03:55:01 -04:00 |
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[Docs] (P8-SV): the package note - the four items with their before/after, the design, the gates, ten red-once rows, the monolith observation and what was found but not fixed
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2026-09-30 03:45:40 -04:00 |
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[Fix] (Espryt, P8-SE): a spawn / tcp server publishes the default framebuffer's depth/stencil format (it has no frontend placeholder; the case leaves pending-fix for the three arms); the server CPU mip arm declines by name (generate-mipmap-store-declined) instead of filtering a store the driver wrote over, and E's refused-readback knob reaches it (CpuMipRefused. entries); WireIndirectDrawScenario case 3 runs on the Espryt split arms; copy-image-shadow-mirror goes and unmigrated_emulation_sites.py holds PipeCatalogueTest's list to the call sites
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2026-09-30 03:44:29 -04:00 |
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[Test] (P8-SV): WireMipShapeScenario (3D chain on both backends x every arm, 1D depth decline on Magma split+spawn, the 3D chain under the validation layer inproc) and WireIndirectDispatchScenario (both backends x every arm, Magma gated .IndirectDispatch.), the MipmapDepthStencilAspect tally in F1's depth/stencil decline case, WireDeclinePeek, and the two parity rows
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2026-09-30 03:44:03 -04:00 |
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[Fix] (Magma, P8-SV): the wire arm's 3D native mip blit uses one layer with the depth in its z offsets, the depth/stencil mip decline gets its WireDeclineTally row (MipmapDepthStencilAspect), the depth shader mip refuses 1D/1D-array/3D view types before the chain grows, and glDispatchComputeIndirect is issued as vkCmdDispatchIndirect from the wire store (P8-D's barrier rule, wdsp counter, two named declines)
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2026-09-30 03:44:03 -04:00 |
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[Docs] (P8): the monolith defect count is 12 (13 reports, one duplicate between C and D), 9 of them left to P13, not 14 and 11
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2026-09-30 03:24:47 -04:00 |
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[Docs] (P8): wave 1 integrated - rulings ID-P8-5..13 (the survey, packages A-F, the integration gate, the wave 2 scope and the monolith defects left to P13), the survey note, open questions 9/11/15 answered, the debts and the P8 contract amendments, the P8 README table, PLAN-P8 wave 2 and the status page
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2026-09-30 03:09:09 -04:00 |
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[Merge] (P8): integrate package E - a texture readback the Espryt driver refuses is answered from the split server's staged store, which now follows glCopyImageSubData (FollowCopy, client-box merge, sticky driver-written mark, named decline texture-readback-store-declined); CopyImageStoreReadbackScenario on both backends x every arm plus the extent-scoped StoreRead knob; the dead CopyImageSubData+RENDERBUFFER latch goes (census 79 -> 78)
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2026-09-30 02:17:51 -04:00 |
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[Merge] (P8): integrate package D - the Magma wire arm issues glDraw*Indirect / glMultiDraw*Indirect[Count] natively from the wire store (vkCmdDraw*Indirect[Count]) instead of a CPU expansion behind a GPU-idle wait, with an INDIRECT_COMMAND_READ barrier once per shader write; windr[] PipeStats counters and WireIndirectDrawScenario on both backends x every arm
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2026-09-30 01:28:20 -04:00 |
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[Merge] (P8): integrate package C - the Espryt split server refreshes its staged copy of a buffer a shader wrote before a CPU reader consumes it (storage/atomic/buffer-image marks, XFB captures into the copy; restart rewrite, multi-draw rebase, *IndirectCount, CPU-fed indirect fields, XFB scatter and fp64 narrowing read through SplitHostBytesForCpuRead); GpuWrittenDrawInputScenario (12 cases) on the Espryt split arms
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2026-09-30 00:45:16 -04:00 |
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[Merge] (P8): integrate package B - Espryt glGenerateMipmap on the server: the record's generated window (BASE/MAX clip, B1) and RGB16F/RGB32F natively or on the server's CPU from the driver's level (B2), retiring both split generate-mipmap names; GenerateMipmapServerScenario on both backends x monolith/Split/Spawn/Tcp plus the forced-CPU arm
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2026-09-30 00:01:29 -04:00 |
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[Docs] (P8-E): the note's gate and retrace readings and two residuals (the extent-scoped tcp knob, the ERROR line before a store answer)
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2026-09-29 23:51:49 -04:00 |
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[Fix] (P8 A): exempt F's Magma-only F1WireScenario.GenerateMipmapWithoutAShaderArmShapeDeclinesAndKeepsTheSession on DirectGLES as single-backend - it landed with P8-F after A's exemption table was cut, skips on Espryt like its F1Wire decline siblings, and split_coverage.py named it missing on the merged head
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2026-09-29 23:41:10 -04:00 |
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[Merge] (P8): integrate package A - register the monolith-only cases on split/spawn/tcp (P8Coverage.cmake, five server-knob tcp supervisors), gate them with split_coverage.py and its exemption table, pin the tcp supervisor's Vulkan env
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2026-09-29 23:37:12 -04:00 |
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[Docs] (P8-A): the note says what the census measured about the audit's 396 and DoublePrecision on tcp, and the knob-port comment names the split/verify one-port overlap
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2026-09-29 23:18:08 -04:00 |
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[Docs] (P8-B): the package note - the generated window and the server CPU arm, the coverage matrix, seven red-onces and monolith defects M1-M3 recorded for dev
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2026-09-29 23:16:05 -04:00 |
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[Merge] (P8): integrate package F - reclassify what our client cannot send: the multi-draw latches and Magma client-vertex-array become ProtocolCorruption, Magma mip shader-shape becomes a pre-growth named decline, unpublished cap bits and the index-mirror sentinel marked reserved
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2026-09-29 23:07:03 -04:00 |
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[Docs] (P8-C): the package note - readers and writers of the server's staged copy, the twelve GPU-written draw-input cases, each red-once, the retrace subset and the five monolith defects recorded for dev
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2026-09-29 22:53:18 -04:00 |
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[Docs] (P8-E): the package note - the split read never touched a shadow, the store route and FollowCopy, the red-once table, the monolith defect for dev
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2026-09-29 22:43:02 -04:00 |
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[Fix] (Espryt, P8-E): a texture readback the driver refuses is answered from the server's staged store, which now follows glCopyImageSubData (FollowCopy, client-box merge, sticky driver-written mark, named decline); CopyImageStoreReadbackScenario on both backends x four arms plus the extent-scoped store-read knob; the dead CopyImageSubData+RENDERBUFFER latch goes (census 79 -> 78)
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2026-09-29 22:43:02 -04:00 |
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[Fix] (Espryt, P8-C): the split server refreshes its staged copy of a buffer a shader wrote before a CPU reader consumes it - storage/atomic/buffer-image writes mark the server twin, XFB captures land in the copy, the restart rewrite, multi-draw rebase, *IndirectCount, CPU-fed indirect fields, XFB scatter and fp64 narrowing read through SplitHostBytesForCpuRead; GpuWrittenDrawInputScenario (12 cases) on the split arms
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2026-09-29 22:38:33 -04:00 |
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[Test] (P8-F): give the mip shader-shape decline its own .ShaderMipDecline. tail - spawn_lane_parity.py holds each server-knob tail to exactly one case, and sharing .ShaderMip1. named two
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2026-09-29 22:37:49 -04:00 |
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[Perf] (P8-D, Magma): the wire arm issues glDraw*Indirect / glMultiDraw*Indirect[Count] as vkCmdDraw*Indirect[Count] from the wire store instead of expanding them on the CPU behind a GPU-idle wait (create-indirect split: 321 waits / ~8 s -> 0), with an INDIRECT_COMMAND_READ barrier once per shader write; windr[] PipeStats counters, WireIndirectDrawScenario on both backends x every arm, notes/p8/D.md
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2026-09-29 22:32:49 -04:00 |
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[Docs] (P8-A): the package note - the 304-case census per arm, the server-knob lanes and their supervisors, the exemption classes, the red-once record, lane wall times and the findings
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2026-09-29 22:30:20 -04:00 |
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[Fix] (P8-A): the tcp lane's shared supervisor carries the Vulkan ICD and the three lavapipe iterationRP repairs, which Magma reads in the server - DirectVulkan.Tcp IterationRPProgram203 missed its golden output by one texel without them
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2026-09-29 22:30:20 -04:00 |
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[Fix] (Espryt, P8-B): glGenerateMipmap on the server - the record's plan is the generated window (B1) and RGB16F/RGB32F generate natively or on the server's CPU from its own level (B2), retiring both split generate-mipmap names; GenerateMipmapServerScenario on both backends x monolith/Split/Spawn/Tcp plus the forced-CPU arm
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2026-09-29 22:22:55 -04:00 |
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[Docs] (P8-F): cite MG_Backend/Init.cpp by path - the bare basename is ambiguous
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2026-09-29 22:15:45 -04:00 |
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[Docs] (P8-F): the package note - the four items, their evidence, the red-once record and what was found but not fixed
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2026-09-29 22:15:29 -04:00 |
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[Refactor] (P8-F): reclassify what our client cannot send - the multi-draw client-indices/instanced latches and Magma's client-vertex-array become ProtocolCorruption, Magma's mipmap-shader-format-or-shape becomes a named decline decided before the chain grows (with a knob-forced 3D case on split and spawn), and the three unpublished cap bits and the index-mirror sentinel are marked reserved
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2026-09-29 22:15:29 -04:00 |
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[Test] (P8-A): register the monolith-only integration cases on the split, spawn and tcp arms (P8Coverage.cmake: 246 ambient cases, five server-knob lanes each on its own tcp supervisor), retire the ClientSideIndices and GuiBatch exclusions, and gate the rest with split_coverage.py and its exemption table
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2026-09-29 22:14:31 -04:00 |
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[Docs] (P8): re-scope the phase - strike the original scope in the roadmap and the P8 README, add PLAN-P8 (six items closed, packages P8-0 and A-G, the rewritten gates) and rulings ID-P8-1..4, and mark P8 in progress on the status page
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2026-09-29 21:31:15 -04:00 |
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[Docs] (P11): the status page lists the decisions waiting on the user - the P8 start and the six debt rulings
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2026-09-29 21:17:21 -04:00 |
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[Docs] (P11): ruling ID-P11-20 - the closing head's gate, lanes and retrace numbers
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2026-09-29 21:13:12 -04:00 |
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[Docs] (Debts): the debt review - drop the closed E1, DualBlock and GetCaps-blobref rows (open question 24 closed, the blobref rule now a CONTRACT-P5 row-18 invariant), move the unmeasured M2 note to MEASUREMENTS, rewrite HyperOS / P11 RSS / named refusals, split the P12 row, merge the two CI rows, add three B2 rows, and mark each destination as needing a ruling or ready
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2026-09-29 21:12:28 -04:00 |
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[Docs] (P11): close the phase - rulings ID-P11-17..19 (B2 T0 zero-copy, the stale indexed binding and Magma empty-uniform fixes with the skip-hole, T0 on by default), B2-DEVICE, the P11 README, the roadmap row and header, the status page and the debts P11 hands on
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2026-09-29 20:33:00 -04:00 |
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