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[Docs] (Disaggregated): consolidate into a single MGPipe plan and drop the replica plan
...
- docs/Disaggregated/PLAN.md is now the one plan: the MGPipe design with the transport, control-plane, present, threading, EGL/process, monolith/build chapters inlined as real chapters (7-13) instead of references, sections renumbered 0-17 + appendices, every internal citation updated
- the replica-GLContext plan and its review record are removed at the user's request; REVIEW.md is the MGPipe design-competition and adversarial-review record only, with the comparison verdicts dropped and the remaining finding text reworded to the new section numbers
- day-43 GO/NO-GO now names its two outcomes (continue / shrink to headless tooling or re-evaluate) without any rollback path
2026-09-05 14:06:24 -04:00
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[Docs] (Disaggregated): land plan B - MGPipe, a gallium-style explicit frontend/backend interface with a backend-owned state machine (client-allocated {slot,gen} handles, CSOs keyed on the pipeline subset with dynamic state pushed separately, set_* catalogue derived from the twins the two backends already keep, per-verb validate with aggregate generations, reverse channel as ten named callbacks plus a pull terminator, strangler migration behind PipeInputs with per-verb poison and a field-wise verify harness, three purity gates replacing byte identity), the item-by-item comparison against the replica plan A (memory, copies, drift surface, monolith benefit vs 4x effort and 7x later first frame) with a day-43 GO/NO-GO hedge, and the round-2 design-competition and adversarial-review record; mark plan A as superseded except for its inherited transport sections
2026-09-05 13:05:43 -04:00
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[Docs] (Disaggregated): land the two-process split plan - server runs the unchanged backends against a replica GLContext driven by mutator replay, the client is the sole originator of every implicit-publish semantic (persistent-map push, MarkGpuWritten, texture dirty clear, XFB accounting, generated-mip allocation), SPSC shm ring with FlatBuffers structs on the hot path and tables on the control socket, two-way doorbells, present credit 1, spawn-only shipping build with an inproc CI variant, and a P0-P9 schedule gated on the existing unit/integration/retrace/CTS suites; plus the design-competition and adversarial-review record
2026-09-05 09:21:58 -04:00
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[Test] (ShaderTranspiler, Integration): pin the five reworked shapes - the read-only capture stage through the real link, the seeded carrier's ESSL declaration, the metadata-driven block redeclaration and its decline, the control-stage-less evaluation decline, and a carrier clearing an i64vec4
2026-08-28 06:22:12 -04:00
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[Fix] (Link, Async): carry the resolved gl_PointSize capture request into the SPIR-V handoff and let a deferred verdict name its own severity - the demotion read the request off a reflection slice phase A never fills it into, so its forced carrier was dead code, and its decline reason replayed at a level no shipped build keeps
2026-08-28 06:22:12 -04:00
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97e07190ac
[Fix] (ShaderTranspiler): seed a forced point-size carrier nothing writes and decline a control stage whose live clip/cull distance would still print gl_PointSize - an ES front end deletes a never-written output, and SPIRV-Cross redeclares that block from member decorations rather than access
2026-08-28 06:22:11 -04:00
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[Fix] (ShaderTranspiler): stop the point-size carrier landing on a location a live varying owns, and decline the evaluation stage a synthesized pass-through control stage cannot feed - an i64vec4 counted as one location, and a located input carrier trips both backends' pass-through guard
2026-08-28 06:22:11 -04:00
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1c113e4b26
[Fix] (ShaderTranspiler): count a 64-bit integer vector as two locations in the XFB flattener's LocationSpan - it read 64-bitness off the element's float type alone, so an i64vec3/4 member packed the members after it onto locations it already owns
2026-08-28 06:22:11 -04:00
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[Test] (Integration): PointSizeDemotionScenario - the demoted value chain is client-invisible in both configurations, with pinned per-backend lanes and a log-latch arming guard
2026-08-28 06:22:10 -04:00
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[Test] (ShaderTranspiler): pin the point-size demotion's shapes - capability stripped, carriers named and located past the program's varyings, byte-identical no-ops, whole-struct-copy decline, and the two new L1 key bits
2026-08-28 06:21:31 -04:00
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[Fix] (ShaderTranspiler, Link, DirectGLES, DirectVulkan): demote tessellation/geometry gl_PointSize to an ordinary varying where the device cannot host the built-in - the value survives for gl_in reads and by-name capture, both backends' declines stay for shapes the pass refuses, and the verdict rides the L1 key
2026-08-28 06:21:30 -04:00
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92dc41ebf9
[Test] (DirectVulkan, SelfTest): pin the probe's fence-timeout teardown against a fake driver, the never-worse arming refusal, and paused-span patch/instanced counting against an unpaused control
2026-08-28 06:19:41 -04:00
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feea131d8b
[Fix] (DirectVulkan, SelfTest): honour the primitives-generated probe's leak-on-timeout contract in both of its callers, count paused-span draws the frontend cannot price, refuse a substitute measured worse than the stream query, and derive the POST row's failure clause from the measurement
2026-08-28 06:19:40 -04:00
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[Test] (DirectVulkan): pin the primitives-generated probe's verdict and override mapping, and hold the reroute's GL answers and arming observable on the integration lane
2026-08-28 06:19:40 -04:00
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[Fix] (DirectVulkan): count GL_PRIMITIVES_GENERATED for transform-feedback-inactive draws - a bring-up probe measures the silent stream query and reroutes such draws through the dedicated primitives-generated query or a clipping-statistics pool, reported from the Vulkan POST
2026-08-28 06:19:39 -04:00
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[Fix] (Espryt): land a SubData into an adopted store as a GPU-ordered copy - the in-place coherent write tore the frames still reading the old section bytes
2026-08-28 04:50:07 -04:00
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[Test] (Integration): pin the adopted mesh-arena store - cross-frame SubData visibility, readback identity, and the GPU-written readback
2026-08-28 04:19:11 -04:00
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[Fix] (Espryt): adopt mesh-arena-sized stores into coherent persistent maps at definition, and stop the flush tiers from re-synchronizing them
2026-08-28 04:19:11 -04:00
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ff426da3a9
[Fix, Test] (MG_State, DirectVulkan): order host writes to an adopted store after recorded GPU work - a SubData issued after a dispatch landed in coherent memory before the deferred dispatch executed, so its increments overwrote the newer bytes; un-skip the DirectVulkan half of the SubData-after-dispatch scenario
2026-08-28 03:01:15 -04:00
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[Chore] (Config): point the two stale comments at the renamed feature fields
2026-08-28 00:47:35 -04:00
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[Chore] (Config): triage backend-scoped env toggles under MOBILEGL_ESPRYT_ and MOBILEGL_MAGMA_ prefixes
2026-08-28 00:38:17 -04:00
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7fd4550968
[Fix] (Espryt): copy before any FBO attach in the packed16 probe - attaching the array relayouts it to the plain order and was neutralizing the subject
2026-08-28 00:22:16 -04:00
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[Fix] (Espryt): probe every allocation recipe of the packed16 shape - the Mali layout heuristic inverts between contexts, so one recipe cannot speak for the storage
2026-08-28 00:22:16 -04:00
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[Test] (SelfTest): model the params-before-upload escape so a params-first probe regression reads as a red test
2026-08-28 00:22:15 -04:00
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[Fix] (Espryt): allocate the packed16 probe's textures uploads-first, the order a minted backend texture performs and the one the Mali layout choice keys on
2026-08-28 00:22:15 -04:00
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[Fix] (Espryt): re-arm the packed16 probe on the allocation-scoped mirror the device actually has and let any mirrored level trigger the widening
2026-08-28 00:22:15 -04:00
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[CI] (Integration): rerun the buffer scenarios with the map flush disabled so the upload-ring tier keeps coverage
2026-08-28 00:15:15 -04:00
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[Fix] (DirectGLES): flush queued buffer ranges through a range-invalidating map first, so a partial write into a busy store is priced by the range
2026-08-27 23:54:19 -04:00
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[Test] (Integration): scope the SubData-after-dispatch readback case to DirectGLES, naming the DirectVulkan upload-ordering gap it exposed
2026-08-27 23:04:52 -04:00
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2cd1809c29
[Fix] (Review): rebuild the packed16 probe on the CTS's three-level chains and let the POST row answer for the widening knob actually in force
2026-08-27 22:46:13 -04:00
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[Test] (IntegrationTest): shield the packed16 renderbuffer clear from an inherited scissor
2026-08-27 22:46:13 -04:00
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[Fix] (Espryt): store RGB565/RGB5_A1/RGBA4 as 8-bit channels where a POST probe measures the Mali packed16 array-mip field-order mirror
2026-08-27 22:46:12 -04:00
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[Test] (Integration): pin that a queued SubData survives an immediate readback of a GPU-written buffer
2026-08-27 22:19:45 -04:00
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[Fix] (DirectGLES): queue app buffer updates and flush them through a staged-copy upload ring instead of stalling in glBufferSubData
2026-08-27 22:19:44 -04:00
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[Fix] (Readback): size a cube-face pack buffer by one face, and give a cube view's face its owner layer
2026-08-27 22:05:23 -04:00
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[Test] (Readback): pin the one-face pixel pack buffer and a cube view's per-face layers
2026-08-27 21:58:51 -04:00
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[Fix] (Readback): read the cube face a readback names, and let glGetTextureSubImage name one
2026-08-27 21:54:47 -04:00
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[Test] (Readback): pin that a cube map's readback answers the face it was asked for
2026-08-27 21:54:46 -04:00
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[Test] (Review): pin the inverted override mapping, the probe's controls, and that the pinned-on lane is really armed
2026-08-27 21:06:01 -04:00
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[Fix, Test] (Review): strip a block's member-level locations too, restore the probe's colour mask, and let the POST verdict follow the override
2026-08-27 20:15:31 -04:00
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[Test] (TranslationCache): pin the two interface-block location-strip flags as L2 key material
2026-08-27 20:07:49 -04:00
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[Fix] (SelfTest): give the located-interface-block probe its own entry-point gate instead of the storage probe's
2026-08-27 19:56:26 -04:00
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[Fix] (DirectGLES): run the interface-block location strip last, where its deliberately Vulkan-invalid module reaches no validator
2026-08-27 19:44:18 -04:00
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[Fix, Test] (DirectGLES, SelfTest, MG_Test): probe the located-interface-block defect with its controls and cover the strip in both gates
2026-08-27 19:38:39 -04:00
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[Fix] (DirectGLES, ShaderTranspiler): drop the location qualifier from inter-stage interface blocks on a driver that loses their payload
2026-08-27 19:18:35 -04:00
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[Test] (Review): give the geometry point-size case its own capability probe
2026-08-27 15:42:04 -04:00
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[Fix] (Review): decline a point-size program the device cannot run, bound the compile-failure source dump, and correct the pass-through rationale
2026-08-27 15:42:04 -04:00
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[Test] (Tessellation): unit and headless-GPU coverage for capturing a patch draw's per-vertex payload
2026-08-27 15:06:02 -04:00
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[Fix] (DirectVulkan): mirror gl_PointSize for capture and enable the feature its stages need
2026-08-27 15:06:02 -04:00
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[Fix] (DirectGLES): request the point-size extension a tessellation or geometry stage's ESSL needs
2026-08-27 15:06:01 -04:00
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