swung0x48 ec973fba84 [Fix] (Magma): a hang-watch marker slot is reused once its submission's fence completed, not once the host read its event.

2026-10-07 17:53:39 -04:00

..

BufferArena.cpp

[Refactor] (P13 W6b): the data-arm predicate folds out of every backend branch; frontend-arm unit cases go, three adapted, and two GL sampling rules move to an integration scenario.

2026-10-06 16:39:52 -04:00

BufferArena.h

[Feat] (MG_Backend/DirectVulkan): Buffer arena, buffer slice

2026-03-19 17:23:52 +08:00

BufferSlice.h

[Feat] (MG_Backend/DirectVulkan): Buffer arena, buffer slice

2026-03-19 17:23:52 +08:00

FrameContext.cpp

[Refactor] (P13 W6b): the data-arm predicate folds out of every backend branch; frontend-arm unit cases go, three adapted, and two GL sampling rules move to an integration scenario.

2026-10-06 16:39:52 -04:00

FrameContext.h

[Perf] (DirectVulkan): reuse completed command buffers instead of freeing and allocating one per submission

2026-10-04 06:02:43 -04:00

GpuProgressMarkers.cpp

[Fix] (Magma): a hang-watch marker slot is reused once its submission's fence completed, not once the host read its event.

2026-10-07 17:53:39 -04:00

GpuProgressMarkers.h

[Fix] (Magma): a hang-watch marker slot is reused once its submission's fence completed, not once the host read its event.

2026-10-07 17:53:39 -04:00

MagmaPipeArms.h

[Refactor] (P13 W6c): Magma's frontend arm goes - the frontend program source, sampled-set walk, placeholder textures, VAO draw memos, identity tables and fast path - leaving the record arm.

2026-10-06 17:55:44 -04:00

MagmaProgramSource.h

[Perf] (Magma): wire draws stop rehashing program SPIR-V and stop allocating per draw (rd12 monolith 45.7 -> 56.7 fps).

2026-10-07 10:07:42 -04:00

OffscreenSurfaceRoute.h

[Fix] (DirectVulkan): build offscreen targets of a window-created renderer through AImageReader instead of a null headless entry point

2026-10-02 11:42:14 -04:00

PipelineFactory.cpp

[Refactor] (P13): the legacy BufferBackendOps table, Magma's never-populated texture/render-pass/renderbuffer caches and VkClearManager go, and the buffer mock tests drive the resource op table instead (ratchet 36 -> 27).

2026-10-06 21:39:39 -04:00

PipelineFactory.h

[Refactor] (P13): the legacy BufferBackendOps table, Magma's never-populated texture/render-pass/renderbuffer caches and VkClearManager go, and the buffer mock tests drive the resource op table instead (ratchet 36 -> 27).

2026-10-06 21:39:39 -04:00

ProgramFactory.cpp

[Refactor] (P13 W6c): Magma's frontend arm goes - the frontend program source, sampled-set walk, placeholder textures, VAO draw memos, identity tables and fast path - leaving the record arm.

2026-10-06 17:55:44 -04:00

ProgramFactory.h

[Fix] (Magma): decline programs whose final SPIR-V fails validation instead of handing the module to the driver

2026-10-02 23:09:58 -04:00

RenderPassGuard.h

[Perf] (DirectVulkan): keep the wire draw's render pass open across draws to the same attachments, closing it only for work that cannot sit inside one

2026-10-04 06:18:35 -04:00

SubmitFencePrefix.h

[MG_Backend, MG_Test] (P7): prove aggregate waits with a single-fence control

2026-09-23 03:53:37 -04:00

SwapchainObject.cpp

[Refactor] (P13 W3b): strip the push/legacy-memo guards from both backends

2026-10-06 04:04:44 -04:00

SwapchainObject.h

[Feature] (Present): buffer age and swap damage end to end on Espryt and Magma

2026-10-02 15:19:39 -04:00

UniformManager.cpp

[Perf] (Magma): a wire draw whose image descriptors cannot have moved rebinds its descriptor set with fresh buffer offsets (rd12 monolith 60.5 -> 63.3, inproc 83.7 -> 89.7 fps).

2026-10-07 12:15:10 -04:00

UniformManager.h

[Perf] (Magma): a wire draw whose image descriptors cannot have moved rebinds its descriptor set with fresh buffer offsets (rd12 monolith 60.5 -> 63.3, inproc 83.7 -> 89.7 fps).

2026-10-07 12:15:10 -04:00

VertexInputStateBuilder.cpp

[Feat] (MG_Backend/DirectVulkan): vertex input state factory

2026-02-17 10:24:01 +08:00

VertexInputStateBuilder.h

[Feat] (MG_Backend/DirectVulkan): vertex input state factory

2026-02-17 10:24:01 +08:00

VertexInputStateFactory.cpp

[Perf] (Magma): the wire vertex-input layout is kept on its vertex-elements record and buffer handles resolve through a slot-indexed front.

2026-10-07 14:58:22 -04:00

VertexInputStateFactory.h

[Perf] (Magma): the wire vertex-input layout is kept on its vertex-elements record and buffer handles resolve through a slot-indexed front.

2026-10-07 14:58:22 -04:00

VkBufferManager.cpp

[Perf] (P14): one UBO-ring lookup per draw, split residual copy/stamp loops, one context read for GPU-write marks, Magma slice stamps from the owner's counter (rd12 monolith Espryt 88.8 -> 90.3, Magma 69.8 -> 70.3 fps).

2026-10-07 16:06:02 -04:00

VkBufferManager.h

[Perf] (P14): one UBO-ring lookup per draw, split residual copy/stamp loops, one context read for GPU-write marks, Magma slice stamps from the owner's counter (rd12 monolith Espryt 88.8 -> 90.3, Magma 69.8 -> 70.3 fps).

2026-10-07 16:06:02 -04:00

VkBufferObject.cpp

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

VkBufferObject.h

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

VkClearManager.cpp

[Refactor] (P13): the legacy BufferBackendOps table, Magma's never-populated texture/render-pass/renderbuffer caches and VkClearManager go, and the buffer mock tests drive the resource op table instead (ratchet 36 -> 27).

2026-10-06 21:39:39 -04:00

VkClearManager.h

[Refactor] (P13): the legacy BufferBackendOps table, Magma's never-populated texture/render-pass/renderbuffer caches and VkClearManager go, and the buffer mock tests drive the resource op table instead (ratchet 36 -> 27).

2026-10-06 21:39:39 -04:00

VkRenderPassManager.cpp

[Refactor] (P13): the legacy BufferBackendOps table, Magma's never-populated texture/render-pass/renderbuffer caches and VkClearManager go, and the buffer mock tests drive the resource op table instead (ratchet 36 -> 27).

2026-10-06 21:39:39 -04:00

VkRenderPassManager.h

[Refactor] (P13): the legacy BufferBackendOps table, Magma's never-populated texture/render-pass/renderbuffer caches and VkClearManager go, and the buffer mock tests drive the resource op table instead (ratchet 36 -> 27).

2026-10-06 21:39:39 -04:00

VkSamplerManager.cpp

[Perf] (Magma): wire draws memoise each unit's sampler and skip rebinding an unchanged pipeline, vertex or index binding (rd12 monolith 57.9 -> 60.3 fps).

2026-10-07 10:50:38 -04:00

VkSamplerManager.h

[Perf] (Magma): wire draws memoise each unit's sampler and skip rebinding an unchanged pipeline, vertex or index binding (rd12 monolith 57.9 -> 60.3 fps).

2026-10-07 10:50:38 -04:00

VkTextureManager.cpp

[Perf] (Magma): texture level uploads stop waiting for the GPU to drain; queue order and the upload barrier already order them (rd12 monolith 70.4 -> 83.4, openra 367 -> 745 fps).

2026-10-07 16:26:07 -04:00

VkTextureManager.h

[Perf] (Magma): wire texture and buffer lookups get direct-mapped fronts and a continued pass stops re-marking its attachments (rd12 monolith 59.6 -> 60.5 fps).

2026-10-07 11:25:02 -04:00

VkTextureSamplerManager.cpp

Merge branch 'dev' into Feat/Backend-Direct-Vulkan

2026-03-08 10:31:44 +08:00

VkTimerQueryManager.cpp

[Fix, Feat, Test] (MG_Util, MG_Backend, MG_Impl, MG_State): correct the log severity ordering and unwind the diagnostics it silenced

2026-08-13 02:02:49 -04:00

VkTimerQueryManager.h

[Feat] (MG_Impl, MG_Backend): GL_ARB_timer_query on both backends

2026-07-10 01:08:38 +00:00

VulkanRenderer.cpp

[Fix] (Magma): a hang-watch marker slot is reused once its submission's fence completed, not once the host read its event.

2026-10-07 17:53:39 -04:00

VulkanRenderer.h

[Perf] (Magma): texture level uploads stop waiting for the GPU to drain; queue order and the upload barrier already order them (rd12 monolith 70.4 -> 83.4, openra 367 -> 745 fps).

2026-10-07 16:26:07 -04:00

WireColorBlit.frag

[MG_Backend, MG_IntegrationTest] (Disaggregated): rotate native Magma window blits through server-owned shaders

2026-09-20 03:06:26 -04:00

WireColorBlit.inc

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WireColorBlit.vert

[MG_Backend, MG_IntegrationTest] (Disaggregated): rotate native Magma window blits through server-owned shaders

2026-09-20 03:06:26 -04:00

WireColorBlitFilter.h

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WireColorBlitSpirv.h

[MG_Backend, MG_Test, MG_IntegrationTest, scripts, docs] (P7): the depth mip chain is baked, and every baked header in the tree now has to match its source

2026-09-22 16:37:54 -04:00

WireDeclines.def

[Fix] (Magma): decline programs whose final SPIR-V fails validation instead of handing the module to the driver

2026-10-02 23:09:58 -04:00

WireDeclineTally.h

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WireDepthMipmap.frag

[MG_Backend, MG_Test, MG_IntegrationTest, scripts, docs] (P7): the depth mip chain is baked, and every baked header in the tree now has to match its source

2026-09-22 16:37:54 -04:00

WireDepthMipmap.inc

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WireDepthMipmap.vert

[MG_Backend, MG_Test, MG_IntegrationTest, scripts, docs] (P7): the depth mip chain is baked, and every baked header in the tree now has to match its source

2026-09-22 16:37:54 -04:00

WireDepthMipmapSpirv.h

[MG_Backend, MG_Test, MG_IntegrationTest, scripts, docs] (P7): the depth mip chain is baked, and every baked header in the tree now has to match its source

2026-09-22 16:37:54 -04:00

WireDepthResolveArm.h

[MG_Backend, MG_Test, MG_IntegrationTest, scripts] (P7): a private image placeholder is keyed by (shape, unit) and capped, and the depth-resolve identity is built by a tested helper

2026-09-23 17:45:57 -04:00

WireDepthResolveProbe.cpp

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WireDepthResolveProbe.h

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WireDraw.inc

[Perf] (Magma): the wire vertex-input layout is kept on its vertex-elements record and buffer handles resolve through a slot-indexed front.

2026-10-07 14:58:22 -04:00

WireFramebuffer.inc

[Perf] (Magma): a wire draw that provably continues the open pass skips the attachment resolve and pass-key walk (rd12 monolith 63.2 -> 65.5, inproc 89.8 -> 92.6 fps).

2026-10-07 13:21:24 -04:00

WireMultisampleDepthResolve.frag

[MG_Backend, MG_IntegrationTest, MG_Test] (P7): a multisample depth or stencil buffer resolves on a device with no resolve extension, and the sample-count shapes with no arm decline

2026-09-22 18:29:22 -04:00

WireMultisampleResolve.inc

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WireMultisampleResolve.vert

[MG_Backend, MG_IntegrationTest, MG_Test] (P7): a multisample depth or stencil buffer resolves on a device with no resolve extension, and the sample-count shapes with no arm decline

2026-09-22 18:29:22 -04:00

WireMultisampleResolveSpirv.h

[MG_Backend, MG_IntegrationTest, MG_Test] (P7): a multisample depth or stencil buffer resolves on a device with no resolve extension, and the sample-count shapes with no arm decline

2026-09-22 18:29:22 -04:00

WireMultisampleStencilResolve.frag

[MG_Backend, MG_IntegrationTest, MG_Test] (P7): a multisample depth or stencil buffer resolves on a device with no resolve extension, and the sample-count shapes with no arm decline

2026-09-22 18:29:22 -04:00

WirePlaceholderImages.inc

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WirePlaceholderKey.h

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WireRenderPassCompatibility.h

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WireSharedImage.inc

[Feature] (SharedImage): sample NV12/P010 dma-bufs through GL_OES_EGL_image_external on both backends, copying foreign buffers into server YUV images

2026-10-03 22:46:00 -04:00

WireTextureReadback.inc

[Refactor] (P13 W5 S8): MOBILEGL_BUILD_RECORD_ARM is folded away - the record arm is unconditional - and retired_switches keeps it from coming back.

2026-10-06 15:03:11 -04:00

WireYuvConvert.frag

[Feature] (SharedImage): sample NV12/P010 dma-bufs through GL_OES_EGL_image_external on both backends, copying foreign buffers into server YUV images

2026-10-03 22:46:00 -04:00

WireYuvConvert.vert

[Feature] (SharedImage): sample NV12/P010 dma-bufs through GL_OES_EGL_image_external on both backends, copying foreign buffers into server YUV images

2026-10-03 22:46:00 -04:00

WireYuvConvertSpirv.h

[Feature] (SharedImage): sample NV12/P010 dma-bufs through GL_OES_EGL_image_external on both backends, copying foreign buffers into server YUV images

2026-10-03 22:46:00 -04:00

WireYuvImage.inc

[Perf] (DirectVulkan): keep the wire draw's render pass open across draws to the same attachments, closing it only for work that cannot sit inside one

2026-10-04 06:18:35 -04:00